例句與造句

1. Eliminate trigger timing errors with trigger delay
   觸發(fā)時延,消除觸發(fā)定時誤差
2. The pulse width trigger circuit , trigger delay circuit are discussed . and a new kind of peak detection module which is implemented by verilog hdl in fpga and greatly enhances the performance of catching glitch is discussed in the dissertation . the waveform recorder function accomplished in the scopemeter can test , monitor slow analog signals and record the characteristic value of signals continuously for a long time
   本文討論了脈寬觸發(fā)電路和觸發(fā)釋抑電路的實(shí)現(xiàn),采用veriloghdl在fpga中實(shí)現(xiàn)了一種峰值檢測模塊,提高了示波表的毛刺捕捉能力,設(shè)計的波形記錄( recorder )功能模塊能夠?qū)斎氲哪M信號進(jìn)行長時間連續(xù)不斷的采樣量化,并記錄波形數(shù)據(jù)和及時送顯示。
3. It's difficult to find trigger delay in a sentence. 用trigger delay造句挺難的